HPC Architecture and Application Research Center of the Faculty of Electrical Engineering and Computing at the University of Zagreb is looking for professionals/researchers with expertise in RTL Design and Verification for ASIC and FPGA designs to join us in the following projects: European Processor Initiative, MareNostrum Experimental Exascale Platform, Heterogeneous Computing Systems with Customizable Accelerators.
EPI – European Processor Initiative: a strategically important EU-funded project, with the goal of developing a new processor for future exascale HPC and other domains. The project gathers 28 partners from the leading research institutions of the EU and industrial partners. It is a unique opportunity to contribute on shaping the future HPC processor and the entire computing stack.
MEEP – MareNostrum Experimental Exascale Platform: MEEP aims to create a state-of-art emulation and software development platform for exascale systems based on European technology, that supports the development of new and reusable IP targeting FPGAs and eventually, ASICs. MEEP will be of size and scale that goes far beyond normal academic or industrial prototyping platforms, enabling chips and system emulation. It will be of sufficient scale to emulate a meaningful fraction of the HPC environment.
HCSCA – Heterogeneous Computing Systems with Customizable Accelerators: a project conducted with our partners from Switzerland, at the ETH Zürich, with the goal of developing high-performance low-power heterogeneous computing systems, consisting of general-purpose RISC-V CPU and domain-specific accelerators for video-processing, deep learning, crypto-processing.
To qualify for the positions, you must have at least a master’s level degree in Computer Science or Computer Engineering or in a related field. In addition, we expect you to have the experience in design and verification of complex digital designs with the specific experience in:
- SystemVerilog or other HDL for verification and RTL coding,
- Design and verification of systems/digital designs (UVM as a plus),
- Software tools for simulation and RTL implementation/mapping (QuestaSim, VCS, FPGA tools, Synopsys, Cadence),
- Processor architecture and computer arithmetic,
- Automation using scripting languages and tools.
We also expect your communication skills in English (written and spoken) to be at least at B2/C1 level.
Please, send us your CV (link or a one-pager) and a short note explaining your ideas, motivation and expectations to firstname.lastname@example.org.